 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| 15 MHz Rail-to-Rail Operational Amplifiers OP162/OP262/OP462 FEATURES Wide bandwidth: 15 MHz Low offset voltage: 325 V max Low noise: 9.5 nV/Hz @ 1 kHz Single-supply operation: 2.7 V to 12 V Rail-to-rail output swing Low TCVOS: 1 V/C typ High slew rate: 13 V/s No phase inversion Unity-gain stable PIN CONFIGURATIONS NULL 1 -IN A 2 +IN A 3 8 NULL V+ OP162 7 NC = NO CONNECT Figure 1. 8-Lead Narrow-Body SOIC (S Suffix) NULL 1 -IN A +IN A 2 3 4 8 NULL V+ OUT A NC 00288-002 00288-006 OP162 TOP VIEW (Not to Scale) 7 6 5 APPLICATIONS Portable instrumentation Sampling ADC amplifier Wireless LANs Direct access arrangement Office automation V- NC = NO CONNECT Figure 2. 8-Lead TSSOP (RU Suffix) 8-Lead MSOP (RM Suffix) OUT A 1 -IN A 2 +IN A 3 8 V+ OUT B 00288-003 00288-005 00288-004 OP262 7 GENERAL DESCRIPTION The OP162 (single), OP262 (dual), and OP462 (quad) rail-torail 15 MHz amplifiers feature the extra speed new designs require, with the benefits of precision and low power operation. With their incredibly low offset voltage of 45 V (typical) and low noise, they are perfectly suited for precision filter applications and instrumentation. The low supply current of 500 A (typical) is critical for portable or densely packed designs. In addition, the rail-to-rail output swing provides greater dynamic range and control than standard video amplifiers. These products operate from single supplies as low as 2.7 V to dual supplies of 6 V. The fast settling times and wide output swings recommend them for buffers to sampling A/D converters. The output drive of 30 mA (sink and source) is needed for many audio and display applications; more output current can be supplied for limited durations. The OPx62 family is specified over the extended industrial temperature range (-40C to +125C). The single OP162 amplifiers are available in 8-lead SOIC, MSOP, and TSSOP packages. The dual OP262 amplifiers are available in 8-lead SOIC and TSSOP packages. The quad OP462 amplifiers are available in 14-lead, narrow-body SOIC and TSSOP packages. 6 -IN B TOP VIEW V- 4 (Not to Scale) 5 +IN B Figure 3. 8-Lead Narrow-Body SOIC (S Suffix) OUT A 1 -IN A 2 8 V+ OUT B -IN B +IN B OP262 TOP VIEW (Not to Scale) 7 6 5 +IN A 3 V- 4 Figure 4. 8-Lead TSSOP (RU Suffix) OUT A 1 -IN A 2 +IN A 3 V+ 4 14 13 OUT D -IN D +IN D OP462 12 TOP VIEW 11 V- (Not to Scale) +IN B 5 10 +IN C -IN B 6 OUT B 7 9 8 -IN C OUT C Figure 5. 14-Lead Narrow-Body SOIC (S Suffix) OUT A 1 -IN A 2 +IN A 3 V+ 4 +IN B 5 -IN B 6 OUT B 7 14 13 OUT D -IN D +IN D V- +IN C -IN C OUT C OP462 TOP VIEW (Not to Scale) 12 11 10 9 8 Figure 6. 14-Lead TSSOP (RU Suffix) Rev. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2005 Analog Devices, Inc. All rights reserved. 00288-001 6 OUT A TOP VIEW V- 4 (Not to Scale) 5 NC OP162/OP262/OP462 TABLE OF CONTENTS Specifications...........................................................................................3 Absolute Maximum Ratings.................................................................6 ESD Caution.................................................................................. 6 Typical Performance Characteristics ..................................................7 Applications ...........................................................................................12 Functional Description.............................................................. 12 Offset Adjustment ...................................................................... 12 Rail-to-Rail Output .................................................................... 12 Output Short-Circuit Protection.............................................. 12 Input Overvoltage Protection ................................................... 13 Output Phase Reversal............................................................... 13 Power Dissipation....................................................................... 13 Unused Amplifiers ..................................................................... 14 Power-On Settling Time............................................................ 14 Capacitive Load Drive ............................................................... 14 Total Harmonic Distortion and Crosstalk .............................. 15 PCB Layout Considerations...................................................... 15 Application Circuits ............................................................................ 16 Single-Supply Stereo Headphone Driver................................. 16 Instrumentation Amplifier........................................................ 16 Direct Access Arrangement ...................................................... 17 Spice Macro-Model .................................................................... 18 Outline Dimensions ............................................................................ 19 Ordering Guide .......................................................................... 20 REVISION HISTORY 1/05--Rev. E to Rev. F Changes to Absolute Maximum Ratings Table 4 and Table 5 .... 6 Change to Figure 36 ....................................................................... 13 Changes to Ordering Guide .......................................................... 20 12/04--Rev. D to Rev. E Updated Format..................................................................Universal Changes to General Description .................................................... 1 Changes to Specifications ................................................................ 3 Changes to Package Type................................................................. 6 Change to Figure 16 ......................................................................... 8 Change to Figure 22 ......................................................................... 9 Change to Figure 36 ....................................................................... 13 Change to Figure 37 ....................................................................... 14 Changes to Ordering Guide .......................................................... 20 10/02--Rev. C to Rev. D Deleted 8-Lead Plastic DIP (N-8) ....................................Universal Deleted 14-Lead Plastic DIP (N-14) ................................Universal Edits to ORDERING GUIDE........................................................ 19 Edits to Figure 30............................................................................ 19 Edits to Figure 31............................................................................ 19 Updated Outline Dimensions ....................................................... 19 Rev. F | Page 2 of 20 OP162/OP262/OP462 SPECIFICATIONS @ VS = 5.0 V, VCM = 0 V, TA = 25C, unless otherwise noted. Table 1. Electrical Characteristics Parameter INPUT CHARACTERISTICS Offset Voltage Symbol VOS Conditions OP162G, OP262G, OP462G -40C TA +125C H grade, -40C TA +125C D grade -40C TA +125C -40C TA +125C Input Offset Current Input Voltage Range Common-Mode Rejection Large Signal Voltage Gain IOS -40C TA +125C VCM CMRR AVO 0 V VCM 4.0 V, -40C TA +125C RL = 2 k, 0.5 VOUT 4.5 V RL = 10 k, 0.5 VOUT 4.5 V RL = 10 k, -40C TA +125C G grade 0 70 65 40 110 30 88 600 1 250 IL = 250 A, -40C TA +125C IL = 5 mA IL = 250 A, -40C TA +125C IL = 5 mA Short to ground 4.95 4.85 4.99 4.94 14 65 80 30 120 90 600 500 750 1 700 850 2.5 Min Typ 45 Max 325 800 1 3 5 600 650 25 40 4 Unit V V mV mV mV nA nA nA nA V dB V/mV V/mV V/mV V V/C pA/C V V mV mV mA mA dB dB A mA A A V/s ns MHz Degrees V p-p nV/Hz pA/Hz 0.8 360 Input Bias Current IB Long-Term Offset Voltage1 Offset Voltage Drift2 Bias Current Drift OUTPUT CHARACTERISTICS Output Voltage Swing High Output Voltage Swing Low Short-Circuit Current Maximum Output Current POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier VOS VOS/T IB/T VOH VOL ISC IOUT PSRR ISY 50 150 VS = 2.7 V to 7 V -40C TA +125C OP162, VOUT = 2.5 V -40C TA +125C OP262, OP462, VOUT = 2.5 V -40C TA +125C 1 V < VOUT < 4 V, RL = 10 k To 0.1%, AV = -1, VO = 2 V step DYNAMIC PERFORMANCE Slew Rate Settling Time Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density 1 2 SR tS GBP m en p-p en in 10 540 15 61 0.5 9.5 0.4 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125C, with an LTPD of 1.3. Offset voltage drift is the average of the -40C to +25C delta and the +25C to +125C delta. Rev. F | Page 3 of 20 OP162/OP262/OP462 @ VS = 3.0 V, VCM = 0 V, TA = 25C, unless otherwise noted. Table 2. Electrical Characteristics Parameter INPUT CHARACTERISTICS Offset Voltage Symbol VOS Conditions OP162G, OP262G, OP462G G, H grades, -40C TA +125C D grade -40C TA +125C Min Typ 50 0.8 360 2.5 0 V VCM 2.0 V, -40C TA +125C RL = 2 k, 0.5 V VOUT 2.5 V RL = 10 k, 0.5 V VOUT 2.5 V G grade IL = 250 A IL= 5 mA IL = 250 A IL= 5 mA VS = 2.7 V to 7 V, -40C TA +125C OP162, VOUT = 1.5 V -40C TA +125C OP262, OP462, VOUT = 1.5 V -40C TA +125C RL = 10 k To 0.1%, AV = -1, VO = 2 V step 0 70 20 110 20 30 600 2.95 2.85 2.99 2.93 14 66 Max 325 1 3 5 600 25 2 Unit V mV mV mV nA nA V dB V/mV V/mV V V V mV mV Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Large Signal Voltage Gain Long-Term Offset Voltage1 OUTPUT CHARACTERISTICS Output Voltage Swing High Output Voltage Swing Low POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier IB IOS VCM CMRR AVO VOS VOH VOL 50 150 PSRR ISY 60 110 600 500 700 1 650 850 dB A mA A A V/s ns MHz Degrees V p-p nV/Hz pA/Hz DYNAMIC PERFORMANCE Slew Rate Settling Time Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density 1 SR tS GBP m en p-p en in 10 575 15 59 0.5 9.5 0.4 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125C, with an LTPD of 1.3. Rev. F | Page 4 of 20 OP162/OP262/OP462 @ VS = 5.0 V, VCM = 0 V, TA = 25C, unless otherwise noted. Table 3. Electrical Characteristics Parameter INPUT CHARACTERISTICS Offset Voltage Symbol VOS Conditions OP162G, OP262G, OP462G -40C TA +125C H grade, -40C TA +125C D grade -40C TA +125C -40C TA +125C Input Offset Current Input Voltage Range Common-Mode Rejection Large Signal Voltage Gain IOS -40C TA +125C VCM CMRR AVO -4.9 V VCM +4.0 V, -40C TA +125C RL = 2 k, -4.5 V VOUT +4.5 V RL = 10 k, -4.5 V VOUT +4.5 V -40C TA +125C G grade -5 70 75 25 110 35 120 600 1 250 IL = 250 A, -40C TA +125C IL= 5 mA IL = 250 A, -40C TA +125C IL= 5 mA Short to ground 4.95 4.85 4.99 4.94 -4.99 -4.94 80 30 2.5 Min Typ 25 Max 325 800 1 3 5 500 650 25 40 +4 Unit V V mV mV mV nA nA nA nA V dB V/mV V/mV V/mV V V/C pA/C V V V V mA mA 0.8 260 Input Bias Current IB Long-Term Offset Voltage1 Offset Voltage Drift2 Bias Current Drift OUTPUT CHARACTERISTICS Output Voltage Swing High Output Voltage Swing Low Short-Circuit Current Maximum Output Current POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier VOS VOS/T IB/T VOH VOL ISC IOUT PSRR ISY -4.95 -4.85 VS = 1.35 V to 6 V, -40C TA +125C OP162, VOUT = 0 V -40C TA +125C OP262, OP462, VOUT = 0 V -40C TA +125C 60 110 650 550 Supply Voltage Range DYNAMIC PERFORMANCE Slew Rate Settling Time Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density 1 2 VS SR tS GBP m en p-p en in -4 V < VOUT < 4 V, RL = 10 k To 0.1%, AV = -1, VO = 2 V step 3.0 (1.5) 13 475 15 64 0.5 9.5 0.4 800 1.15 775 1 12 (6) dB A mA A mA V V/s ns MHz Degrees V p-p nV/Hz pA/Hz 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at +125C, with an LTPD of 1.3. Offset voltage drift is the average of the -40C to +25C delta and the +25C to +125C delta. Rev. F | Page 5 of 20 OP162/OP262/OP462 ABSOLUTE MAXIMUM RATINGS Table 4. Parameter Supply Voltage Input Voltage1 Differential Input Voltage2 Internal Power Dissipation SOIC (S) MSOP (RM) TSSOP (RU) Output Short-Circuit Duration Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature Range (Soldering, 10 sec) Min 6 V 6 V 0.6 V Observe Derating Curves Observe Derating Curves Observe Derating Curves Observe Derating Curves -65C to +150C -40C to +125C -65C to +150C 300C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 5. Package Type 8-Lead SOIC (S) 8-Lead TSSOP (RU) 8-Lead MSOP (RM) 14-Lead SOIC (S) 14-Lead TSSOP (RU) JA1 157 208 190 105 148 JC 56 44 Unit C/W C/W C/W C/W C/W 1 2 For supply voltages greater than 6 V, the input voltage is limited to less than or equal to the supply voltage. For differential input voltages greater than 0.6 V, the input current should be limited to less than 5 mA to prevent degradation or destruction of the input devices. ____________________________ 1 JA is specified for the worst-case conditions, that is, JA is specified for a device soldered in circuit board for SOIC, MSOP, and TSSOP packages. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. F | Page 6 of 20 OP162/OP262/OP462 TYPICAL PERFORMANCE CHARACTERISTICS 250 VS = 5V TA = 25C COUNT = 720 OP AMPS 125 VS = 5V 150 INPUT OFFSET VOLTAGE (V) 00288-007 200 100 QUANTITY (Amplifiers) 75 100 50 50 25 00288-010 0 -200 -140 -80 -20 40 100 INPUT OFFSET VOLTAGE (V) 160 0 -75 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125 150 Figure 7. OP462 Input Offset Voltage Distribution 100 VS = 5V TA = 25C COUNT = 360 OP AMPS Figure 10. OP462 Input Offset Voltage vs. Temperature 0 VS = 5V -100 80 QUANTITY (Amplifiers) 60 INPUT BIAS CURRENT (nA) 00288-008 -200 40 -300 20 -400 00288-011 0 0.2 0.3 0.5 0.7 0.9 1.1 1.3 INPUT OFFSET DRIFT, TCVOS (V,C) 1.5 -500 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125 150 Figure 8. OP462 Input Offset Voltage Drift (TCVOS) 420 VS = 5V INPUT OFFSET CURRENT (nA) 15 Figure 11. OP462 Input Bias Current vs. Temperature VS = 5V 340 INPUT CURRENT (nA) 10 260 5 180 00288-009 100 0 0.5 1.0 1.5 2.0 2.5 3.0 COMMON-MODE VOLTAGE (V) 3.5 4.0 0 -75 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125 150 Figure 9. OP462 Input Bias Current vs. Common-Mode Voltage Figure 12. OP462 Input Offset Current vs. Temperature Rev. F | Page 7 of 20 00288-012 OP162/OP262/OP462 5.12 VS = 5V 100 IOUT = 250A 5.00 OUTPUT LOW VOLTAGE (mV) OUTPUT HIGH VOLTAGE (V) 5.06 80 60 VS = 10V 40 VS = 3V 4.94 IOUT = 5mA 4.88 00288-013 20 00288-016 4.82 -75 0 0 1 2 3 4 5 LOAD CURRENT (mA) 6 7 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125 150 Figure 13. OP462 Output High Voltage vs. Temperature 0.100 VS = 5V Figure 16. Output Low Voltage to Supply Rail vs. Load Current 1.0 0.9 0.8 OUTPUT LOW VOLTAGE (mV) 0.080 SUPPLY CURRENT (mA) IOUT = 5mA 0.060 VS = 10V 0.7 0.6 0.5 0.4 0.3 0.2 VS = 5V VS = 3V 0.040 0.020 00288-014 IOUT = 250A 0.000 -75 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125 0.1 0 -75 -50 -25 0 25 75 TEMPERATURE (C) 100 125 150 150 Figure 14. OP462 Output Low Voltage vs. Temperature 100 RL = 10k 80 0.7 Figure 17. Supply Current/Amplifier vs. Temperature TA = 25C OPEN-LOOP GAIN (V/mV) VS = 5V 60 SUPPLY CURRENT (mA) 0.6 40 RL = 2k 20 RL = 600k 0 -75 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125 00288-015 0.5 150 0 2 4 6 8 SUPPLY VOLTAGE (V) 10 12 Figure 15. OP462 Open-Loop Gain vs. Temperature Figure 18. OP462 Supply Current/Amplifier vs. Supply Voltage Rev. F | Page 8 of 20 00288-018 0.4 00288-017 OP162/OP262/OP462 50 40 30 20 GAIN (dB) 10 0 -10 -20 -30 100k PHASE VS = 5V TA = 25C 45 PHASE SHIFT (dB) 4 GAIN 3 0.1% 2 VS = 5V TA = 25C 0.01% 135 180 225 STEP SIZE (V) 90 1 0 -1 -2 0.1% 0.01% 00288-022 00288-019 270 -3 -4 1M 10M FREQUENCY (Hz) 100M 0 200 400 600 SETTLING TIME (nS) 800 1000 Figure 19. Open-Loop Gain and Phase vs. Frequency (No Load) 60 VS = 5V TA = 25C RL = 830 CL = 5pF 60 Figure 22. Step Size vs. Settling Time 40 50 CLOSED-LOOP GAIN (dB) VS = 5V TA = 25C TA = 50mV RL = 10k 20 OVERSHOOT (%) 40 30 +OS -OS 0 20 -20 00288-020 10 00288-023 -30 10k 100k 1M FREQUENCY (Hz) 10M 100M 0 10 100 CAPACITANCE (pF) 1000 Figure 20. Closed-Loop Gain vs. Frequency 5 70 60 4 Figure 23. Small-Signal Overshoot vs. Capacitance MAXIMUM OUTPUT SWING (V p-p) VS = 5V TA = 25C NOISE DENSITY (nV/Hz) 00288-021 50 3 40 30 20 10 0 1 10 100 FREQUENCY (Hz) 1k 2 VS = 5V AVCL = 1 RL = 10k CL = 15pF TA = 25C DISTORTION<1% 100k 1M FREQUENCY (Hz) 1 0 10k 10M Figure 21. Maximum Output Swing vs. Frequency Figure 24. Voltage Noise Density vs. Frequency Rev. F | Page 9 of 20 00288-024 OP162/OP262/OP462 7 6 VS = 5V TA = 25C 90 80 70 VS = 5V TA = 25C NOISE DENSITY (pA/Hz) 5 PSRR (dB) 4 3 2 1 0 1 10 100 FREQUENCY (Hz) 1k 60 +PSRR 50 40 -PSRR 00288-025 20 1k 10k 100k FREQUENCY (Hz) 1M 10M Figure 25. Current Noise Density vs. Frequency 300 VS = 5V TA = 25C 100 90 Figure 28. PSRR vs. Frequency 20mV 2s 250 OUTPUT IMPEDANCE () 200 150 AVCL = 10 100 10 AVCL = 1 50 00288-026 0% 0 100k 1M FREQUENCY (Hz) 10M Figure 26. Output Impedance vs. Frequency 90 80 70 VS = 5V TA = 25C 100 90 Figure 29. 0.1 Hz to 10 Hz Noise 2V VIN = 12V p-p VS = 5V AV = 1 CMRR (dB) 60 50 40 10 0% 00288-027 2V 20s 20 1k 10k 100k FREQUENCY (Hz) 1M 10M Figure 27. CMRR vs. Frequency Figure 30. No Phase Reversal (VIN = 12 V p-p, VS = 5 V, AV = 1) Rev. F | Page 10 of 20 00288-030 30 00288-029 VS = 5V AV = 100k en = 0.5V p-p 00288-028 30 OP162/OP262/OP462 VS = 5V AV = 1 TA = 25C CL = 100pF VS = 5V AV = 1 100 TA = 25C CL = 100pF 90 100 90 10 0% 00288-031 10 0% 20mV 200ns 500mV 100s Figure 31. Small Signal Transient Response Figure 32. Large Signal Transient Response Rev. F | Page 11 of 20 00288-032 OP162/OP262/OP462 APPLICATIONS FUNCTIONAL DESCRIPTION The OPx62 family is fabricated using Analog Devices' high speed complementary bipolar process, also called XFCB. This process trench isolates each transistor to lower parasitic capacitances for high speed performance. This high speed process has been implemented without sacrificing the excellent transistor matching and overall dc performance characteristic of Analog Devices' complementary bipolar process. This makes the OPx62 family an excellent choice as an extremely fast and accurate low voltage op amp. Figure 33 shows a simplified equivalent schematic for the OP162. A PNP differential pair is used at the input of the device. The cross connecting of the emitters lowers the transconductance of the input stage improving the slew rate of the device. Lowering the transconductance through cross connecting the emitters has another advantage in that it provides a lower noise factor than if emitter degeneration resistors were used. The input stage can function with the base voltages taken all the way to the negative power supply, or up to within 1 V of the positive power supply. VCC OFFSET ADJUSTMENT Because the OP162/OP262/OP462 have an exceptionally low typical offset voltage, adjustment to correct offset voltage may not be needed. However, the OP162 has pinouts to attach a nulling resistor. Figure 34 shows how the OP162 offset voltage can be adjusted by connecting a potentiometer between Pin 1 and Pin 8, and connecting the wiper to VCC. It is important to avoid accidentally connecting the wiper to VEE, as this can damage the device. The recommended value for the potentiometer is 20 k. +5V 1 8 3 20k 7 OP162 4 2 6 VOS -5V Figure 34. Offset Adjustment Schematic RAIL-TO-RAIL OUTPUT The OP162/OP262/OP462 have a wide output voltage range that extends to within 60 mV of each supply rail with a load current of 5 mA. Decreasing the load current extends the output voltage range even closer to the supply rails. The common-mode input range extends from ground to within 1 V of the positive supply. It is recommended that there be some minimal amount of gain when a rail-to-rail output swing is desired. The minimum gain required is based on the supply voltage and can be found as AV,min = 00288-033 +IN -IN VOUT VS VS - 1 VEE Figure 33. Simplified Schematic where VS is the positive supply voltage. With a single-supply voltage of 5 V, the minimum gain to achieve rail-to-rail output should be 1.25. Two complementary transistors in a common-emitter configuration are used for the output stage. This allows the output of the device to swing to within 50 mV of either supply rail at load currents less than 1 mA. As load current increases, the maximum voltage swing of the output decreases. This is due to the collector-to-emitter saturation voltages of the output transistors increasing. The gain of the output stage, and consequently the open-loop gain of the amplifier, is dependent on the load resistance connected at the output. Because the dominant pole frequency is inversely proportional to the open-loop gain, the unity-gain bandwidth of the device is not affected by the load resistance. This is typically the case in rail-to-rail output devices. OUTPUT SHORT-CIRCUIT PROTECTION To achieve a wide bandwidth and high slew rate, the output of the OP162/OP262/OP462 are not short-circuit protected. Shorting the output directly to ground or to a supply rail may destroy the device. The typical maximum safe output current is 30 mA. Steps should be taken to ensure the output of the device will not be forced to source or sink more than 30 mA. In applications where some output current protection is needed, but not at the expense of reduced output voltage headroom, a low value resistor in series with the output can be used. This is shown in Figure 35. The resistor is connected within the feedback loop of the amplifier so that if VOUT is shorted to ground Rev. F | Page 12 of 20 00288-034 OP162/OP262/OP462 and VIN swings up to 5 V, the output current will not exceed 30 mA. For single 5 V supply applications, resistors less than 169 are not recommended. 5V To calculate the internal junction temperature of the OPx62, use the formula TJ = PDISS x JA + TA where: TJ is the OPx62 junction temperature. PDISS is the OPx62 power dissipation. JA is the OPx62 package thermal resistance, junction-toambient temperature. TA is the ambient temperature of the circuit. The power dissipated by the device can be calculated as PDISS = ILOAD x (VS - VOUT) where: ILOAD is the OPx62 output load current. VS is the OPx62 supply voltage. VOUT is the OPx62 output voltage. Figure 36 and Figure 37 provide a convenient way to determine if the device is being overheated. The maximum safe power dissipation can be found graphically, based on the package type and the ambient temperature around the package. By using the previous equation, it is a simple matter to see if PDISS exceeds the device's power derating curve. To ensure proper operation, it is important to observe the recommended derating curves shown in Figure 36 and Figure 37. 0.9 VIN OPx62 169 VOUT Figure 35. Output Short-Circuit Protection INPUT OVERVOLTAGE PROTECTION The input voltage should be limited to 6 V, or damage to the device can occur. Electrostatic protection diodes placed in the input stage of the device help protect the amplifier from static discharge. Diodes are connected between each input as well as from each input to both supply pins as shown in the simplified equivalent circuit in Figure 33. If an input voltage exceeds either supply voltage by more than 0.6 V, or if the differential input voltage is greater than 0.6 V, these diodes energize causing overvoltage damage. The input current should be limited to less than 5 mA to prevent degradation or destruction of the device by placing an external resistor in series with the input at risk of being overdriven. The size of the resistor can be calculated by dividing the maximum input voltage by 5 mA. For example, if the differential input voltage could reach 5 V, the external resistor should be 5 V/5 mA = 1 k. In practice, this resistor should be placed in series with both inputs to balance any offset voltages created by the input bias current. 00288-035 MAXIMUM POWER DISSIPATION (Watts) 0.8 0.7 8-LEAD SOIC 0.6 0.5 8-LEAD MSOP 0.4 8-LEAD TSSOP 0.3 0.2 0.1 0 20 40 60 80 100 AMBIENT TEMPERATURE (C) 120 00288-036 OUTPUT PHASE REVERSAL The OP162/OP262/OP462 are immune to phase reversal as long as the input voltage is limited to 6 V. Figure 30 shows the output of a device with the input voltage driven beyond the supply voltages. Although the device's output does not change phase, large currents due to input overvoltage could result, damaging the device. In applications where the possibility of an input voltage exceeding the supply voltage exists, overvoltage protection should be used, as described in the previous section. Figure 36. Maximum Power Dissipation vs. Temperature for 8-Lead Package Types POWER DISSIPATION The maximum power that can be safely dissipated by the OP162/OP262/OP462 is limited by the associated rise in junction temperature. The maximum safe junction temperature is 150C; device performance suffers when this limit is exceeded. If this maximum is only momentarily exceeded, proper circuit operation will be restored as soon as the die temperature is reduced. Leaving the device in an "overheated" condition for an extended period can result in permanent damage to the device. Rev. F | Page 13 of 20 OP162/OP262/OP462 1.2 1 0 TO +5V SQUARE 14-LEAD SOIC MAXIMUM POWER DISSIPATION (Watts) 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 20 45 70 95 AMBIENT TEMPERATURE (C) 120 00288-037 OP462 10K VOUT 14-LEAD TSSOP Figure 39. Test Circuit for Power-On Settling Time CAPACITIVE LOAD DRIVE The OP162/OP262/OP462 are high speed, extremely accurate devices that tolerate some capacitive loading at their outputs. As load capacitance increases, unity-gain bandwidth of an OPx62 device decreases. This also causes an increase in overshoot and settling time for the output. Figure 41 shows an example of this with the device configured for unity gain and driving a 10 k resistor and 300 pF capacitor placed in parallel. By connecting a series R-C network, commonly called a "snubber" network, from the output of the device to ground, this ringing can be eliminated and overshoot can be significantly reduced. Figure 40 shows how to set up the snubber network, and Figure 42 shows the improvement in output response with the network added. 5V Figure 37. Maximum Power Dissipation vs. Temperature for 14-Lead Package Types UNUSED AMPLIFIERS It is recommended that any unused amplifiers in a dual or a quad package be configured as a unity-gain follower with a 1 k feedback resistor connected from the inverting input to the output, and the noninverting input tied to the ground plane. POWER-ON SETTLING TIME The time it takes for the output of an op amp to settle after a supply voltage is delivered can be an important consideration in some power-up-sensitive applications. An example of this would be in an A/D converter where the time until valid data can be produced after power-up is important. The OPx62 family has a rapid settling time after power-up. Figure 38 shows the OP462 output settling times for a singlesupply voltage of VS = +5 V. The test circuit in Figure 39 was used to find the power-on settling times for the device. OPx62 VIN RX CX CL VOUT 00288-040 Figure 40. Snubber Network Compensation for Capacitive Loads 2V 100 90 500ns 100 90 VS = 5V AV = 1 CL = 300pF RL = 10k 10 0% VS = 5V AV = 1 RL = 10k 00288-038 10 0% 50mV 50mV 1s Figure 38. Oscilloscope Photo of VS and VOUT Figure 41. A Photo of a Ringing Square Wave Rev. F | Page 14 of 20 00288-041 00288-039 OP162/OP262/OP462 VS = 5V AV = 1 CL = 300pF RL = 10k WITH SNUBBER: RX = 140 CX = 10nF 100 90 Figure 45 shows the worst case crosstalk between two amplifiers in the OP462. A 1 V rms signal is applied to one amplifier while measuring the output of an adjacent amplifier. Both amplifiers are configured for unity gain and supplied with 2.5 V. 0.010 VS = 2.5V AV = 1 VIN = 1.0V rms RL = 10k BANDWIDTH: <10Hz TO 22kHz 00288-042 10 THD+N (%) 0% 50mV 1s 0.001 Figure 42. A Photo of a Nice Square Wave at the Output The network operates in parallel with the load capacitor, CL, and provides compensation for the added phase lag. The actual values of the network resistor and capacitor are empirically determined to minimize overshoot and maximize unity-gain bandwidth. Table 6 shows a few sample snubber networks for large load capacitors. Table 6. Snubber Networks for Large Capacitive Loads CLOAD < 300 pF 500 pF 1 nF 10 nF RX 140 100 80 10 CX 10 nF 10 nF 10 nF 47 nF 0.0001 20 100 1k FREQUENCY (Hz) 10k 20k Figure 44. THD + N vs. Frequency -40 -50 -60 -70 AV = 1 VIN = 1.0V rms (0dBV) RL = 10k V = 2.5V S XTALK (dBV) -80 -90 -100 -110 -120 -130 -140 20 100 1k FREQUENCY (Hz) 00288-045 Higher load capacitance will reduce the unity-gain bandwidth of the device. Figure 43 shows unity-gain bandwidth vs. capacitive load. The snubber network does not provide any increase in bandwidth, but it substantially reduces ringing and overshoot, as shown between Figure 41 and Figure 42. 10 9 8 BANDWIDTH (MHz) 10k 20k Figure 45. Crosstalk vs. Frequency PCB LAYOUT CONSIDERATIONS Because the OP162/OP262/OP462 can provide gains at high frequency, careful attention to board layout and component selection is recommended. As with any high speed application, a good ground plane is essential to achieve the optimum performance. This can significantly reduce the undesirable effects of ground loops and I x R losses by providing a low impedance reference point. Best results are obtained with a multilayer board design with one layer assigned to ground plane. Use chip capacitors for supply bypassing, with one end of the capacitor connected to the ground plane and the other end connected within 1/8 inch of each power pin. An additional large tantalum electrolytic capacitor (4.7 F to 10 F) should be connected in parallel. This capacitor provides current for fast, large-signal changes at the device's output; therefore, it does not need to be placed as close to the supply pins. 7 6 5 4 3 2 1 0 10pF 100pF CLOAD 1nF 10nF 00288-043 Figure 43. Unity-Gain Bandwidth vs. CLOAD TOTAL HARMONIC DISTORTION AND CROSSTALK The OPx62 device family offers low total harmonic distortion making it an excellent choice for audio applications. Figure 44 shows a graph of THD plus noise figures at 0.001% for the OP462. Rev. F | Page 15 of 20 00288-044 OP162/OP262/OP462 APPLICATION CIRCUITS SINGLE-SUPPLY STEREO HEADPHONE DRIVER Figure 46 shows a stereo headphone output amplifier that can operate from a single 5 V supply. The reference voltage is derived by dividing the supply voltage down with two 100 k resistors. A 10 F capacitor prevents power supply noise from contaminating the audio signal and establishes an ac ground for the volume control potentiometers. The audio signal is ac-coupled to each noninverting input through a 10 F capacitor. The gain of the amplifier is controlled by the feedback resistors and is (R2/R1) + 1. For this example, the gain is 6. By removing R1, the amplifier would have unity gain. To short-circuit protect the output of the device, a 169 resistor is placed at the output in the feedback network. This prevents any damage to the device if the headphone output becomes shorted. A 270 F capacitor is used at the output to couple the amplifier to the headphone. This value is much larger than that used for the input because of the low impedance of headphones, which can range from 32 to 600 or more. R1 = 10k 10F LEFT IN 10F 10k 5V 100k 100k 10F 5V 10k R VOLUME CONTROL 10F OP262-B 47k R2 = 50k R1 = 10k 10F 00288-046 INSTRUMENTATION AMPLIFIER Because of their high speed, low offset voltages, and low noise characteristics, the OP162/OP262/OP462 can be used in a wide variety of high speed applications, including precision instrumentation amplifiers. Figure 47 shows an example of such an application. -VIN OP462-A 2k 1k OP462-D RG 2k 10k 2k 1.9k OP462-C OUTPUT 1k 10k OP462-B +VIN Figure 47. High Speed Instrumentation Amplifier R2 = 50k 5V 270F 47k The differential gain of the circuit is determined by RG, where ADIFF = 1 + 2 RG L VOLUME CONTROL OP262-A 169 HEADPHONE LEFT with the RG resistor value in k. Removing RG sets the circuit gain to unity. The fourth op amp, OP462-D, is optional and is used to improve CMRR by reducing any input capacitance to the amplifier. By shielding the input signal leads and driving the shield with the common-mode voltage, input capacitance is eliminated at common-mode voltages. This voltage is derived from the midpoint of the outputs of OP462-A and OP462-B by using two 10 k resistors followed by OP462-D as a unity-gain buffer. It is important to use 1% or better tolerance components for the 2 k resistors, as the common-mode rejection is dependent on their ratios being exact. A potentiometer should also be connected in series with the OP462-C noninverting input resistor to ground to optimize common-mode rejection. The circuit in Figure 47 was implemented to test its settling time. The instrumentation amp was powered with -5 V, so the input step voltage went from -5 V to +4 V to keep the OP462 within its input range. Therefore, the 0.05% settling range is when the output is within 4.5 mV. Figure 48 shows the positive slope settling time to be 1.8 s, and Figure 49 shows a settling time of 3.9 s for the negative slope. 169 270F HEADPHONE RIGHT RIGHT IN Figure 46. Headphone Output Amplifier Rev. F | Page 16 of 20 00288-047 200 10 TURN (OPTIONAL) OP162/OP262/OP462 5mV 100 90 2V DIRECT ACCESS ARRANGEMENT Figure 50 shows a schematic for a 5 V single-supply transmit/ receive telephone line interface for 600 transmission systems. It allows full-duplex transmission of signals on a transformercoupled 600 line. Amplifier A1 provides gain that can be adjusted to meet the modem output drive requirements. Both A1 and A2 are configured to apply the largest possible differential signal to the transformer. The largest signal available on a single 5 V supply is approximately 4.0 V p-p into a 600 transmission system. Amplifier A3 is configured as a difference amplifier to extract the receive information from the transmission line for amplification by A4. A3 also prevents the transmit signal from interfering with the receive signal. The gain of A4 can be adjusted in the same manner as A1 to meet the modem's input signal requirements. Standard resistor values permit the use of SIP (single in-line package) format resistor arrays. Couple this with the OP462 14-lead SOIC or TSSOP package and this circuit offers a compact solution. P1 TX GAIN ADJUST TO TELEPHONE LINE R2 9.09k 2 A1 3 10 0% 1s Figure 48. Positive Slope Settling Time 5mV 5mV 100 90 2V 00288-048 10 0% 1:1 00288-049 R3 360 R5 10k 2k 1 C1 R1 0.1F 10k TRANSMIT TXA 1s 1s ZO 600 T1 MIDCOM 671-8005 6.2V 6.2V 5V DC R6 10k 6 7 A2 5 10F R9 10k 2 R10 10k R13 10k R8 10k R7 10k Figure 49. Negative Slope Settling Time R11 10k R12 10k 3 A3 1 P2 RX GAIN ADJUST R14 14.3k 6 5 A4 2k 7 RECEIVE RXA A1, A2 = 1/2 AD8532 A3, A4 = 1/2 AD8532 Figure 50. Single-Supply Direct Access Arrangement for Modems Rev. F | Page 17 of 20 00288-050 C2 0.1F OP162/OP262/OP462 SPICE MACRO-MODEL * OP162/OP262/OP462 SPICE Macro-model * 7/96, Ver. 1 * Troy Murphy / ADSC * * Copyright 1996 by Analog Devices * * Refer to "README.DOC" file for License Statement. Use of this model * indicates your acceptance of the terms and provisions in the License * Statement * * Node Assignments noninverting input * inverting input * | positive supply * | | negative supply * | | | output * | | | | * | | | | | * | | | | | .SUBCKT OP162 1 2 99 50 45 * *INPUT STAGE * Q1 5 7 3 PIX 5 Q2 6 2 4 PIX 5 Ios 1 2 1.25E-9 I1 99 15 85E-6 EOS 7 1 POLY(1) (14, 20) 45E-6 1 RC1 5 50 3.035E+3 RC2 6 50 3.035E+3 RE1 3 15 607 RE2 4 15 607 C1 5 6 600E-15 D1 3 8 DX D2 4 9 DX V1 99 8 DC 1 V2 99 9 DC 1 * * 1st GAIN STAGE * EREF 98 0 (20, 0) 1 G1 98 10 (5, 6) 10.5 R1 10 98 1 C2 10 98 3.3E-9 * * COMMON-MODE STAGE WITH ZERO AT 4kHz * ECM 13 98 POLY (2) (1, 98) (2, 98) 0 0.5 0.5 R2 13 14 1E+6 R3 14 98 70 C3 13 14 80E-12 * * POLE AT 1.5MHz, ZERO AT 3MHz * G2 21 98 (10, 98) .588E-6 R4 21 98 1.7E6 R5 21 22 1.7E6 C4 22 98 31.21E-15 * * POLE AT 6MHz, ZERO AT 3MHz * E1 23 98 (21, 98) 2 R6 23 24 53E+3 R7 24 98 53E+3 C5 23 24 1E-12 * * SECOND GAIN STAGE * G3 25 98 (24, 98) 40E-6 R8 25 98 1.65E+6 D3 25 99 DX D4 50 25 DX * * OUTPUT STAGE * GSY 99 50 POLY (1) (99, 50) 277.5E-6 7.5E-6 R9 99 20 100E3 R10 20 50 100E3 Q3 45 41 99 POUT 4 Q4 45 43 50 NOUT 2 EB1 99 40 POLY (1) (98, 25) 0.70366 1 EB2 42 50 POLY (1) (25, 98) 0.73419 1 RB1 40 41 500 RB2 42 43 500 CF 45 25 11E-12 D5 46 99 DX D6 47 43 DX V3 46 41 0.7 V4 47 50 0.7 . MODEL PIX PNP (Bf=117.7) .MODEL POUT PNP (BF=119, IS=2.782E-17, VAF=28, KF=3E-7) .MODEL NOUT NPN (BF=110, IS=1.786E-17, VAF=90, KF=3E-7) .MODEL DX D() .ENDS Rev. F | Page 18 of 20 OP162/OP262/OP462 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 8 5 4 5.10 5.00 4.90 6.20 (0.2440) 5.80 (0.2284) 4.50 4.40 4.30 1 7 4.00 (0.1574) 3.80 (0.1497) 1 14 8 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) 1.75 (0.0688) 1.35 (0.0532) 0.50 (0.0196) x 45 0.25 (0.0099) 6.40 BSC PIN 1 8 0.25 (0.0098) 0 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) 1.05 1.00 0.80 0.65 BSC 1.20 MAX 0.15 0.05 0.30 0.19 0.20 0.09 8 0 0.75 0.60 0.45 0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN SEATING COPLANARITY PLANE 0.10 COMPLIANT TO JEDEC STANDARDS MO-153AB-1 Figure 51. 8-Lead Standard Small Outline Package [SOIC] Narrow Body S-Suffix (R-8) Dimensions shown in millimeters and (inches) 3.00 BSC Figure 54. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters 8.75 (0.3445) 8.55 (0.3366) 8 5 3.00 BSC 1 4.90 BSC 4 4.00 (0.1575) 3.80 (0.1496) 14 1 8 7 6.20 (0.2441) 5.80 (0.2283) PIN 1 0.65 BSC 1.10 MAX 8 0 0.80 0.60 0.40 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 1.27 (0.0500) BSC 1.75 (0.0689) 1.35 (0.0531) 0.50 (0.0197) x 45 0.25 (0.0098) 0.15 0.00 0.38 0.22 COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) SEATING PLANE 8 0.25 (0.0098) 0 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) 0.23 0.08 SEATING PLANE COMPLIANT TO JEDEC STANDARDS MS-012AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MO-187AA Figure 52. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 3.10 3.00 2.90 Figure 55. 14-Lead Standard Small Outline Package [SOIC] Narrow Body S-Suffix (R-14) Dimensions shown in millimeters and (inches) 8 5 4.50 4.40 4.30 1 4 6.40 BSC PIN 1 0.65 BSC 0.15 0.05 COPLANARITY 0.10 0.30 0.19 1.20 MAX SEATING 0.20 PLANE 0.09 8 0 0.75 0.60 0.45 COMPLIANT TO JEDEC STANDARDS MO-153AA Figure 53. 8-Lead Thin Shrink Small Outline Package [TSSOP) (RU-8) Dimensions shown in millimeters Rev. F | Page 19 of 20 OP162/OP262/OP462 ORDERING GUIDE Model OP162GS OP162GS-REEL OP162GS-REEL7 OP162GSZ1 OP162GSZ-REEL1 OP162GSZ-REEL71 OP162DRU-REEL OP162DRUZ-REEL1 OP162HRU-REEL OP162HRUZ-REEL1 OP162DRM-REEL OP162DRMZ-REEL1 OP262DRU-REEL OP262DRUZ-REEL1 OP262GS OP262GS-REEL OP262GS-REEL7 OP262GSZ1 OP262GSZ-REEL1 OP262GSZ-REEL71 OP262HRU-REEL OP262HRUZ-REEL1 OP462DRU-REEL OP462DRUZ-REEL1 OP462DS OP462DS-REEL OP462DS-REEL7 OP462DSZ1 OP462DSZ-REEL1 OP462DSZ-REEL71 OP462GS OP462GS-REEL OP462GS-REEL7 OP462GSZ1 OP462GSZ-REEL1 OP462GSZ-REEL71 OP462HRU-REEL OP462HRUZ-REEL1 1 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Package Description 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead TSSOP 8-Lead TSSOP 8-Lead TSSOP 8-Lead TSSOP 8-Lead MSOP 8-Lead MSOP 8-Lead TSSOP 8-Lead TSSOP 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead TSSOP 8-Lead TSSOP 14-Lead TSSOP 14-Lead TSSOP 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead SOIC 14-Lead TSSOP 14-Lead TSSOP Package Option S-Suffix (R-8) S-Suffix (R-8) S-Suffix (R-8) S-Suffix (R-8) S-Suffix (R-8) S-Suffix (R-8) RU-8 RU-8 RU-8 RU-8 RM-8 RM-8 RU-8 RU-8 S-Suffix (R-8) S-Suffix (R-8) S-Suffix (R-8) S-Suffix (R-8) S-Suffix (R-8) S-Suffix (R-8) RU-8 RU-8 RU-14 RU-14 S-Suffix (R-14) S-Suffix (R-14) S-Suffix (R-14) S-Suffix (R-14) S-Suffix (R-14) S-Suffix (R-14) S-Suffix (R-14) S-Suffix (R-14) S-Suffix (R-14) S-Suffix (R-14) S-Suffix (R-14) S-Suffix (R-14) RU-14 RU-14 Branding AND AOJ Z = Pb-free part. (c) 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00288-0-1/05(F) Rev. F | Page 20 of 20 |
Price & Availability of OP16205
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |